Let's create the FSSK/FEXT = DONE !!!!

andrewjoy

23 Dec 2015, 12:55

I would love to help , but i have no spare SSK :(

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wcass

23 Dec 2015, 20:55

When it comes time to convert your drawing to Gerber files, consider DipTrace. I was never able to properly import DXF into KiCAD, but DipTrace does an excellent job. The "hobbyist" version is free and not limited by size, but by "pins" (under 300). Anything imported from DXF does not count as a "pin", so your total pin count should be under 50 (30 for controller, 4 for LED control, 6 for LEDs, 6 for LED-resistors, a few mount/ground).

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ramnes
ПБТ НАВСЕГДА

23 Dec 2015, 22:13

When you say that no controller is included, do you mean that you're planning to make your PCB compatible with SSK's stock controller, or that it just won't be usable before a controller is made? :D

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idollar
i$

24 Dec 2015, 14:09

ramnes wrote: When you say that no controller is included, do you mean that you're planning to make your PCB compatible with SSK's stock controller, or that it just won't be usable before a controller is made? :D
I meant that in the long run, it would be perfect to have a xwhatsit controler in the PCB.
Bor the time being, it will be a separated PCB, one of the standards used with model Fs.

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idollar
i$

24 Dec 2015, 14:10

wcass wrote: When it comes time to convert your drawing to Gerber files, consider DipTrace. I was never able to properly import DXF into KiCAD, but DipTrace does an excellent job. The "hobbyist" version is free and not limited by size, but by "pins" (under 300). Anything imported from DXF does not count as a "pin", so your total pin count should be under 50 (30 for controller, 4 for LED control, 6 for LEDs, 6 for LED-resistors, a few mount/ground).
I am actually a GNU man also. But I wanted to be sure that I could easily produce a Geber. This is why I have followed wcass recommendation.

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idollar
i$

24 Dec 2015, 14:23

What I am sending with this post is still in draft.

I think that I have managed to create a valid matrix and correct all errors, but I need to check it once more.
table v0.16 .jpg
table v0.16 .jpg (116.88 KiB) Viewed 8167 times
FSSK v0.16 - bottom - draft.jpg
FSSK v0.16 - bottom - draft.jpg (179.91 KiB) Viewed 8167 times
FSSK v0.16 - top - draft.jpg
FSSK v0.16 - top - draft.jpg (217.59 KiB) Viewed 8167 times
FSSK v0.16 - both layers - draft.jpg
FSSK v0.16 - both layers - draft.jpg (255.69 KiB) Viewed 8167 times

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idollar
i$

24 Dec 2015, 18:15

I think that this version, missing the routing to the top of the plate that will connect to the controller resolves all the matrix.

I post the top, bottom and combined layers as well as the table that I am using to track the matrix.
The spreadsheet has a side table counting the number of keys on each row for every column, to ensure that there are not repeated column/row allocations.

I have created a legend for each key in the PCB to track the keys, rows and columns, not only in the table but also in the PCB itself. It consists of three references 1) Column 2) Row 3) key

I will appreciate any feedback

table v0.17 - concatenateC.jpg
table v0.17 - concatenateC.jpg (182 KiB) Viewed 8130 times
FSSK v0.17 - draft - bottom B.jpg
FSSK v0.17 - draft - bottom B.jpg (203.85 KiB) Viewed 8143 times
FSSK v0.17 - draft - top.jpg
FSSK v0.17 - draft - top.jpg (232.95 KiB) Viewed 8143 times
FSSK v0.17 - draft - both.jpg
FSSK v0.17 - draft - both.jpg (266.16 KiB) Viewed 8143 times

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idollar
i$

25 Dec 2015, 11:37

The next step is to route the rows and columns to the xwhatsit controller.
This will not be simple as there is little space between the back plate and the case:
Photo 25-12-15 11 14 19.jpg
Photo 25-12-15 11 14 19.jpg (607.41 KiB) Viewed 8114 times
Photo 25-12-15 11 14 35.jpg
Photo 25-12-15 11 14 35.jpg (766.79 KiB) Viewed 8114 times
Photo 25-12-15 11 21 16.jpg
Photo 25-12-15 11 21 16.jpg (738.88 KiB) Viewed 8114 times
Photo 25-12-15 11 15 10.jpg
Photo 25-12-15 11 15 10.jpg (531.56 KiB) Viewed 8114 times
My proposed solution is to use the space in on top of the back plate to solder a flat cable that could be routed between the metal plate and the case as the membrane does.
Photo 25-12-15 11 31 15.jpg
Photo 25-12-15 11 31 15.jpg (633.48 KiB) Viewed 8114 times
We will need to isolate electrically this part of the plate.
I plan to use the original layer between the flippers and the membrane under the pcb ....
Photo 25-12-15 11 34 57.jpg
Photo 25-12-15 11 34 57.jpg (712.59 KiB) Viewed 8114 times

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chzel

25 Dec 2015, 12:04

Wouldn't a length of kapton tape work well enough? I'd prefer if the final solution keeps the rubber mat intact, to easily switch back to regular SSK.

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idollar
i$

25 Dec 2015, 18:02

chzel wrote: Wouldn't a length of kapton tape work well enough? I'd prefer if the final solution keeps the rubber mat intact, to easily switch back to regular SSK.
I do not plan to modify the rubber may in any way. I will only use under the pcb.

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idollar
i$

25 Dec 2015, 18:14

All,

I think that I have finalised what could be the final draft for your review (SSK only, the Extended version will come latter).

I have routed the top to the connector and the row number changed to get in line with the controller. The configuration will look odd but we will avoid crossing cables and thus, a ribbon cable could be used.

Please, take a look and comment:
table v0.21.jpg
table v0.21.jpg (182.81 KiB) Viewed 8108 times
FSSF v0.21 - top E.jpg
FSSF v0.21 - top E.jpg (584.96 KiB) Viewed 8099 times
FSSF v0.21 - bottom.jpg
FSSF v0.21 - bottom.jpg (597.9 KiB) Viewed 8108 times

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chzel

25 Dec 2015, 21:42

I'm a bit confused...Shouldn't

Code: Select all

C21 R7  be ]}
C22 R8  be \|
C21 R10 be ISO
?

About the rubber mat, you mean to use it between the PCB and the metal backplate like the F's use the transparent sheet?

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idollar
i$

25 Dec 2015, 22:28

chzel wrote: I'm a bit confused...Shouldn't

Code: Select all

C21 R7  be ]}
C22 R8  be \|
C21 R10 be ISO
?
It is even worst, the complete row is incorrect. I miss the "R" !!!
Thanks for pointing it out. I will correct it, both in the table and the references in the PCB.

About the rubber mat, you mean to use it between the PCB and the metal backplate like the F's use the transparent sheet?
Yes, this is what I mean.

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idollar
i$

25 Dec 2015, 22:42

Here are the corrections:

(Changes marked in orange)
Design 0.23.jpg
Design 0.23.jpg (181.51 KiB) Viewed 8065 times
FSSF v0.23 - top.jpg
FSSF v0.23 - top.jpg (501.09 KiB) Viewed 8065 times

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chzel

25 Dec 2015, 22:46

C21R10 should be ISO i think, not Enter.

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idollar
i$

25 Dec 2015, 23:37

chzel wrote: C21R10 should be ISO i think, not Enter.
Correct

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idollar
i$

26 Dec 2015, 01:03

WCASS has commented that each row trace shall cross a column only once.
I need to review the PCBs completely.

Please do not spend time with these versions

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micrex22

26 Dec 2015, 04:38

idollar wrote: I meant that in the long run, it would be perfect to have a xwhatsit controler in the PCB.
Bor the time being, it will be a separated PCB, one of the standards used with model Fs.
I know dfj & parak are working on their capsense controller which will hopefully offer more features than xwhatsit. It would be nice to have an agnostic pinout available just in case an alternative controller is desired to be used (or an option to bypass the onboard xwhatsit controller if that becomes built-in). *Or if the early run is going to (only) be like that, that would suit my purposes just fine as well. ;)

I'm down for testing a prototype board. My bolts will be in shortly so I'll be able to dynamically reassemble the back plate as much as needed.

Also, should we create custom printable 'FSSK' labels? I could whip up a template later.

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wcass

26 Dec 2015, 04:56

IBM did design all of the F with every column crossing ever row exactly one time. The reason for this is that every crossing introduces not-insignificant parasitic capacitance (Cp). Making every row cross every column exactly once is an attempt to keep Cp uniform for every button.

Another thing you will notice about IBM design is that rows gather and come in from one side (with a ground flood on the flip side of the PCB); columns gather and come in from the other side (with a ground flood on the flip side of the PCB). Again, this is to minimize Cp.

Atmel published a great reference for capacitive PCB design. Anyone considering designing a capacitive input device should consider this required reading. IBM and Topre are both "mutual-capacitance buttons", so study section 4.
http://www.atmel.com/images/doc10752.pdf
In this document sense lines are called "Y electrodes" and signal lines are called "X electrodes". On IBM boards, "Y electrodes" run left and right on the top (rows) vs "X electrodes" run up and down on the bottom (columns).
To avoid false keys, use any of the following tricks:
* Cross the X and Y traces as little as possible and then only at 90°
* If the X and Y traces must run parallel to each other for a distance, separate the traces with a ground trace.
* Generally, keep all the X traces together and all the Y traces together. This way the number of potential false keys is substantially reduced.

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Compgeke

26 Dec 2015, 08:21

micrex22 wrote: Also, should we create custom printable 'FSSK' labels? I could whip up a template later.
Not 100% accurate on the bottom label to an original label. Text is too bold but that can be fixed later.

Round label is modeled off an AS/400 badge and as such put at the same angle and font (italic Helvetica).
Image
Last edited by Compgeke on 26 Dec 2015, 20:28, edited 1 time in total.

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idollar
i$

26 Dec 2015, 12:36

wcass wrote: IBM did design all of the F with every column crossing ever row exactly one time. The reason for this is that every crossing introduces not-insignificant parasitic capacitance (Cp). Making every row cross every column exactly once is an attempt to keep Cp uniform for every button.

Another thing you will notice about IBM design is that rows gather and come in from one side (with a ground flood on the flip side of the PCB); columns gather and come in from the other side (with a ground flood on the flip side of the PCB). Again, this is to minimize Cp.

Atmel published a great reference for capacitive PCB design. Anyone considering designing a capacitive input device should consider this required reading. IBM and Topre are both "mutual-capacitance buttons", so study section 4.
http://www.atmel.com/images/doc10752.pdf
In this document sense lines are called "Y electrodes" and signal lines are called "X electrodes". On IBM boards, "Y electrodes" run left and right on the top (rows) vs "X electrodes" run up and down on the bottom (columns).
To avoid false keys, use any of the following tricks:
* Cross the X and Y traces as little as possible and then only at 90°
* If the X and Y traces must run parallel to each other for a distance, separate the traces with a ground trace.
* Generally, keep all the X traces together and all the Y traces together. This way the number of potential false keys is substantially reduced.
Thanks a lot wcass !!!

Here a new version 0.25 taking in consideration your comments.
I had to move the connector to the left to avoid the overlapping that you mentioned.

Let me know you comments :-)

*) I have worked on the FSSK only. The Extended side will come latter.
Design 0.25.jpg
Design 0.25.jpg (205.62 KiB) Viewed 7986 times
FSSF v0.25 - bottom.jpg
FSSF v0.25 - bottom.jpg (570.63 KiB) Viewed 7986 times
FSSF v0.25 - top.jpg
FSSF v0.25 - top.jpg (513.89 KiB) Viewed 7986 times

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idollar
i$

26 Dec 2015, 12:41

Compgeke wrote:
micrex22 wrote: Also, should we create custom printable 'FSSK' labels? I could whip up a template later.
Not 100% accurate on the bottom label to an original label. Text is too bold but that can be fixed later.

Round label is modeled off an AS/400 badge and as such put at the same angle and font (italic Helvetica).
Image
I like your idea of the stickers.
Only one comment, It should read Design in Europe. Made in the USA :-)

The round labels are glorious !

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idollar
i$

26 Dec 2015, 14:26

I was thinking that this could make sense for the bottom layer.
What do you think, wcass ?
FSSF v0.26 - bottom.jpg
FSSF v0.26 - bottom.jpg (472.37 KiB) Viewed 7970 times

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Compgeke

26 Dec 2015, 20:28

idollar wrote: I like your idea of the stickers.
Only one comment, It should read Design in Europe. Made in the USA :-)

The round labels are glorious !
A little more work done and some comparisons to original labels. http://imgur.com/a/GkRcz

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idollar
i$

26 Dec 2015, 23:22

Compgeke wrote:
idollar wrote: I like your idea of the stickers.
Only one comment, It should read Design in Europe. Made in the USA :-)

The round labels are glorious !
A little more work done and some comparisons to original labels. http://imgur.com/a/GkRcz
Great !

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idollar
i$

26 Dec 2015, 23:26

I have worked out the PCB for the full extended Keyboard also:
Design 0.27.jpg
Design 0.27.jpg (197.55 KiB) Viewed 7915 times
Both layers without the extra ground.
Extended F v0.27 - both.jpg
Extended F v0.27 - both.jpg (750.76 KiB) Viewed 7915 times
The top.
Extended F v0.27 - top.jpg
Extended F v0.27 - top.jpg (563.16 KiB) Viewed 7915 times
The bottom.
Extended F v0.27 - bottom.jpg
Extended F v0.27 - bottom.jpg (514.68 KiB) Viewed 7915 times

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wcass

27 Dec 2015, 03:58

The flood on the bottom should probably be avoided. IBM left it off for some reason.

From section 4.2.3 of the Atmel design guide ...
Bringing ground flood or traces close to Y adds parasitic capacitance (Cp) and can cause loss of sensitivity. Keep this in mind when flooding around keys. ... Be careful when adding ground floods on thin PCBs, as the Cp build-up on Y could be substantial due to the reduced separation between layers.
We are talking about using a very thin PCB ... 0.8mm or thinner.

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idollar
i$

27 Dec 2015, 10:22

Thanks. Got it.

I add it as new layers to the PCB. They are easy to remove.

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idollar
i$

30 Dec 2015, 01:45

------ FINAL DRAFT ? -----

Hello again,

I have been working in a new version, which tries to capture and implement all the comments that I have received so far.
Here it is:

Matrix
Design 0.30.jpg
Design 0.30.jpg (696.2 KiB) Viewed 7800 times
FSSK
FSSK 0.30 - top.jpg
FSSK 0.30 - top.jpg (506.8 KiB) Viewed 7798 times
FSSK 0.30 - bottom.jpg
FSSK 0.30 - bottom.jpg (566.3 KiB) Viewed 7796 times
FSSK 0.30 - both.jpg
FSSK 0.30 - both.jpg (679.2 KiB) Viewed 7798 times

FEXM
Extended 0.30 - top.jpg
Extended 0.30 - top.jpg (576.17 KiB) Viewed 7798 times
Extended 0.30 - bottom.jpg
Extended 0.30 - bottom.jpg (624.04 KiB) Viewed 7798 times
Extended 0.30 - both.jpg
Extended 0.30 - both.jpg (776.3 KiB) Viewed 7797 times

I would appreciate comments.
Next steps are to print out the layers, test them, produce the PCB and to enjoy :-)

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wcass

30 Dec 2015, 04:21

One thing i noticed is that the bottom row (pin 3) does not cross any columns. All of IBM's designs have every row crossing every column exactly one time and I made sure i did that with the XTant, but I'm not sure how much difference this makes or what it does. My best guess is that it is an attempt to make all of the rows/columns as uniform as possible vis-a-vis Cx and Cp.

I think you see what i was talking about earlier; this being difficult to do with IBM's original capacitive pad design due to the number and location of the model M rivets. You might look at some of the other capacitive pad designs that i suggested earlier in this thread that allow the rows to pass through the center of the switch rather than forcing them to always go around. At worse you will have one trace competing with a hole in the space between rows rather than two.

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